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      STM32ϵÁÐרΪҪÇó¸ßÐÔÄÜ¡¢µÍ³É±¾¡¢µÍ¹¦ºÄµÄǶÈëʽӦÓÃÉè¼ÆµÄARM Cortex-MÄں˵¥Æ¬»ú£¬ÒªÏëÕý³£¹¤×÷·¢»ÓÆä¹¦ÄÜ£¬»¹ÐèÒªÅäÖúÃʱÖÓ¡£ÎÒÃÇÀ´¿´¿´ÈçºÎÅäÖá£(Ïà¹ØÔĶÁ¿ÉÒÔ²é¿´ÒøºÓ¼¯ÍÅÑïÐ˹ÙÍø¡¶32.768KHZ¾§Õñ¸÷³§¼ÒÐͺÅÓÐÄÄЩ¡·)

      ÔÚSTM32ÖУ¬ÓÐÎå¸öʱÖÓÔ´£¬ÎªHSI¡¢HSE¡¢LSI¡¢LSE¡¢PLL¡£

      ¢ÙHSIÊǸßËÙÄÚ²¿Ê±ÖÓ£¬RCÕñµ´Æ÷£¬ÆµÂÊΪ8MHz¡£

      ¢ÚHSEÊǸßËÙÍⲿʱÖÓ£¬¿É½ÓʯӢ/ÌÕ´ÉгÕñÆ÷£¬»òÕß½ÓÍⲿʱÖÓÔ´£¬ÆµÂÊ·¶Î§Îª4MHz~16MHz¡£

      ¢ÛLSIÊǵÍËÙÄÚ²¿Ê±ÖÓ£¬RCÕñµ´Æ÷£¬ÆµÂÊΪ40kHz¡£

      ¢ÜLSEÊǵÍËÙÍⲿʱÖÓ£¬½ÓƵÂÊΪ32.768kHzµÄʯӢ¾§Ìå¡£

      ¢ÝPLLÎªËøÏà»·±¶ÆµÊä³ö£¬ÆäʱÖÓÊäÈëÔ´¿ÉÑ¡ÔñΪHSI/2¡¢HSE»òÕßHSE/2¡£±¶Æµ¿ÉÑ¡ÔñΪ2~16±¶£¬µ«ÊÇÆäÊä³öƵÂÊ×î´ó²»µÃ³¬¹ý72MHz¡£

      ¶þ¡¢ÔÚSTM32ÉÏÈç¹û²»Ê¹ÓÃÍⲿ¾§Õñ£¬OSC_INºÍOSC_OUTµÄ½Ó·¨£ºÈç¹ûʹÓÃÄÚ²¿RCÕñµ´Æ÷¶ø²»Ê¹ÓÃÍⲿ¾§Õñ£¬Çë°´ÕÕÏÂÃæ·½·¨´¦Àí£º

      ¢Ù¶ÔÓÚ100½Å»ò144½ÅµÄ²úÆ·£¬OSC_INÓ¦½ÓµØ£¬OSC_OUTÓ¦Ðü¿Õ¡£

      ¢Ú¶ÔÓÚÉÙÓÚ100½ÅµÄ²úÆ·£¬ÓÐ2ÖÖ½Ó·¨£ºµÚ1ÖÖ£ºOSC_INºÍOSC_OUT·Ö±ðͨ¹ý10Kµç×è½ÓµØ¡£´Ë·½·¨¿ÉÌá¸ßEMCÐÔÄÜ;µÚ2ÖÖ£º·Ö±ðÖØÓ³ÉäOSC_INºÍOSC_OUTÖÁPD0ºÍPD1£¬ÔÙÅäÖÃPD0ºÍPD1ÎªÍÆÍìÊä³ö²¢Êä³ö'0'¡£´Ë·½·¨¿ÉÒÔ¼õС¹¦ºÄ²¢(Ïà¶ÔÉÏÃæ)½ÚÊ¡2¸öÍⲿµç×è¡£

      Èý¡¢ÓÃHSEʱÖÓ£¬³ÌÐòÉèÖÃʱÖÓ²ÎÊýÁ÷³Ì£º

      01¡¢½«RCC¼Ä´æÆ÷ÖØÐÂÉèÖÃΪĬÈÏÖµ RCC_DeInit;

      02¡¢´ò¿ªÍⲿ¸ßËÙʱÖÓ¾§ÕñHSE RCC_HSEConfig(RCC_HSE_ON);

      03¡¢µÈ´ýÍⲿ¸ßËÙʱÖÓ¾§Õñ¹¤×÷ HSEStartUpStatus = RCC_WaitForHSEStartUp();

      04¡¢ÉèÖÃAHBʱÖÓ RCC_HCLKConfig;

      05¡¢ÉèÖøßËÙAHBʱÖÓ RCC_PCLK2Config;

      06¡¢ÉèÖõÍËÙËÙAHBʱÖÓ RCC_PCLK1Config;

      07¡¢ÉèÖÃPLL RCC_PLLConfig;

      08¡¢´ò¿ªPLL RCC_PLLCmd(ENABLE);

      09¡¢µÈ´ýPLL¹¤×÷ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)

      10¡¢ÉèÖÃϵͳʱÖÓ RCC_SYSCLKConfig;

      11¡¢ÅжÏÊÇ·ñPLLÊÇϵͳʱÖÓ while(RCC_GetSYSCLKSource() != 0x08)

      12¡¢´ò¿ªÒªÊ¹ÓõÄÍâÉèʱÖÓ RCC_APB2PeriphClockCmd()/RCC_APB1PeriphClockCmd()

      * Function Name : RCC_Configuration

      * Description : RCCÅäÖÃ(ʹÓÃÍⲿ8MHz¾§Õñ)

      * Input : ÎÞ

      * Output : ÎÞ

      * Return : ÎÞ

      void RCC_Configuration(void)

      {

      /*½«ÍâÉèRCC¼Ä´æÆ÷ÖØÉèΪȱʡֵ*/

      RCC_DeInit();

      /*ÉèÖÃÍⲿ¸ßËÙ¾§Õñ(HSE)*/

      RCC_HSEConfig(RCC_HSE_ON); //RCC_HSE_ON¡ª¡ªHSE¾§Õñ´ò¿ª(ON)

      /*µÈ´ýHSEÆðÕñ*/

      HSEStartUpStatus = RCC_WaitForHSEStartUp();

      if(HSEStartUpStatus == SUCCESS) //SUCCESS£ºHSE¾§ÕñÎȶ¨ÇÒ¾ÍÐ÷

      {

      /*ÉèÖÃAHBʱÖÓ(HCLK)*/

      RCC_HCLKConfig(RCC_SYSCLK_Div1); //RCC_SYSCLK_Div1¡ª¡ªAHBʱÖÓ= ϵͳʱÖÓ

      /* ÉèÖøßËÙAHBʱÖÓ(PCLK2)*/

      RCC_PCLK2Config(RCC_HCLK_Div1); //RCC_HCLK_Div1¡ª¡ªAPB2ʱÖÓ= HCLK

      /*ÉèÖõÍËÙAHBʱÖÓ(PCLK1)*/

      RCC_PCLK1Config(RCC_HCLK_Div2); //RCC_HCLK_Div2¡ª¡ªAPB1ʱÖÓ= HCLK / 2

      /*ÉèÖÃFLASH´æ´¢Æ÷ÑÓʱʱÖÓÖÜÆÚÊý*/

      FLASH_SetLatency(FLASH_Latency_2); //FLASH_Latency_2 2ÑÓʱÖÜÆÚ

      /*Ñ¡ÔñFLASHԤȡָ»º´æµÄģʽ*/

      FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); // Ԥȡָ»º´æÊ¹ÄÜ

      /*ÉèÖÃPLLʱÖÓÔ´¼°±¶ÆµÏµÊý*/

      RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);

      // PLLµÄÊäÈëʱÖÓ= HSEʱÖÓÆµÂÊ;RCC_PLLMul_9¡ª¡ªPLLÊäÈëʱÖÓx 9

      /*ʹÄÜPLL */

      RCC_PLLCmd(ENABLE);

      /*¼ì²éÖ¸¶¨µÄRCC±ê־λ(PLL×¼±¸ºÃ±êÖ¾)ÉèÖÃÓë·ñ*/

      while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)

      {

      }

      /*ÉèÖÃϵͳʱÖÓ(SYSCLK)*/

      RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

      //RCC_SYSCLKSource_PLLCLK¡ª¡ªÑ¡ÔñPLL×÷ΪϵͳʱÖÓ

      /* PLL·µ»ØÓÃ×÷ϵͳʱÖÓµÄʱÖÓÔ´*/

      while(RCC_GetSYSCLKSource() != 0x08) //0x08£ºPLL×÷ΪϵͳʱÖÓ

      {

      }

      }

      /*ʹÄÜ»òÕßʧÄÜAPB2ÍâÉèʱÖÓ*/

      RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |

      RCC_APB2Periph_GPIOC , ENABLE);

      //RCC_APB2Periph_GPIOA GPIOAʱÖÓ

      //RCC_APB2Periph_GPIOB GPIOBʱÖÓ

      //RCC_APB2Periph_GPIOC GPIOCʱÖÓ

      //RCC_APB2Periph_GPIOD GPIODʱÖÓ

      }

      Î塢ʱÖÓÆµÂÊ

      STM32F103ÄÚ²¿8MµÄÄÚ²¿Õðµ´£¬¾­¹ý±¶Æµºó×î¸ß¿ÉÒÔ´ïµ½72M¡£Ä¿Ç°TIµÄM3ϵÁÐоƬ×î¸ßƵÂÊ¿ÉÒÔ´ïµ½80M¡£

      ÔÚstm32¹Ì¼þ¿â3.0ÖжÔʱÖÓÆµÂʵÄÑ¡Ôñ½øÐÐÁË´ó´óµÄ¼ò»¯£¬Ô­ÏȵÄÒ»´ó¶Ñ²Ù×÷¶¼ÔÚºǫ́½øÐС£ÏµÍ³¸ø³öµÄº¯ÊýΪSystemInit()¡£µ«ÔÚµ÷ÓÃǰ»¹ÐèÒª½øÐÐһЩºê¶¨ÒåµÄÉèÖ㬾ßÌåµÄÉèÖÃÔÚsystem_stm32f10x.cÎļþÖС£

      Îļþ¿ªÍ·¾ÍÓÐÒ»¸öÕâÑùµÄ¶¨Òå:

      //#define SYSCLK_FREQ_HSE HSE_Value

      //#define SYSCLK_FREQ_20MHz 20000000

      //#define SYSCLK_FREQ_36MHz 36000000

      //#define SYSCLK_FREQ_48MHz 48000000

      //#define SYSCLK_FREQ_56MHz 56000000

      #define SYSCLK_FREQ_72MHz 72000000

      ST ¹Ù·½ÍƼöµÄÍâ½Ó¾§ÕñÊÇ 8M,ËùÒԿ⺯ÊýµÄÉèÖö¼ÊǼٶ¨ÄãµÄÓ²¼þÒѾ­½ÓÁË 8M ¾§ÕñÀ´ÔËËãµÄ.ÒÔÉ϶«Î÷¾ÍÊÇĬÈϾ§Õñ 8M µÄʱºò,ÍÆ¼öµÄ CPU ƵÂÊÑ¡Ôñ.ÔÚÕâÀïÑ¡ÔñÁË£º

      #define SYSCLK_FREQ_72MHz 72000000

      Ò²¾ÍÊÇ103ϵÁÐÄÜÅܵ½µÄ×î´óÖµ72M

      È»ºóÕâ¸ö CÎļþ¼ÌÐøÍùÏ¿´

      #elif defined SYSCLK_FREQ_72MHz

      const uint32_t SystemFrequency = SYSCLK_FREQ_72MHz;

      const uint32_t SystemFrequency_SysClk = SYSCLK_FREQ_72MHz;

      const uint32_t SystemFrequency_AHBClk = SYSCLK_FREQ_72MHz;

      const uint32_t SystemFrequency_APB1Clk = (SYSCLK_FREQ_72MHz/2);

      const uint32_t SystemFrequency_APB2Clk = SYSCLK_FREQ_72MHz;

      Õâ¾ÍÊÇÔÚ¶¨ÒåÁËCPUÅÜ72MµÄʱºò,¸÷¸öϵͳµÄËÙ¶ÈÁË.ËûÃÇ·Ö±ðÊÇ:Ó²¼þƵÂÊ,ϵͳʱÖÓ,AHB×ÜÏ߯µÂÊ,APB1×ÜÏ߯µÂÊ,APB2×ÜÏ߯µÂÊ.ÔÙÍùÏ¿´,¿´µ½Õâ¸öÁË:

      #elif defined SYSCLK_FREQ_72MHz

      static void SetSysClockTo72(void);

      Õâ¾ÍÊǶ¨Òå 72M µÄʱºò,ÉèÖÃʱÖӵĺ¯Êý.Õâ¸öº¯Êý±» SetSysClock ()º¯Êýµ÷ÓÃ,¶ø

      SetSysClock ()º¯ÊýÔòÊDZ» SystemInit()º¯Êýµ÷ÓÃ.×îºó SystemInit()º¯Êý,¾ÍÊDZ»Äãµ÷ÓõÄÁË

      ËùÒÔÉèÖÃϵͳʱÖÓµÄÁ÷³Ì¾ÍÊÇ:

      Ê×ÏÈÓû§³ÌÐòµ÷Óà SystemInit()º¯Êý,ÕâÊÇÒ»¸ö¿âº¯Êý,È»ºó SystemInit()º¯ÊýÀïÃæ,½øÐÐÁËһЩ¼Ä´æÆ÷±ØÒªµÄ³õʼ»¯ºó,¾Íµ÷Óà SetSysClock()º¯Êý. SetSysClock()º¯Êý¸ù¾ÝÄǸö#define SYSCLK_FREQ_72MHz 72000000 µÄºê¶¨Òå,ÖªµÀÁËÒªµ÷ÓÃSetSysClockTo72()Õâ¸öº¯Êý,ÓÚÊÇ,¾ÍÒ»¶ÑÂé·³¶ø¸´ÔÓµÄÉèÖÃ~!@#$%^È»ºó,CPUÅÜÆðÀ´ÁË,¶øÇÒËÙ¶ÈÊÇ 72M. ËäȻ˵µÄÓеãÀÛ׸,µ«´ó¼ÒÖ»ÐèÒªÖªµÀ,Óû§ÒªÉèÖÃÆµÂÊ,³ÌÐòÖоÍ×öµÄ¾ÍÁ½¸öÊÂÇé:

      µÚÒ»¸ö: system_stm32f10x.c ÖÐ #define SYSCLK_FREQ_72MHz 72000000

      µÚ¶þ¸ö:µ÷ÓÃSystemInit()

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